The present invention relates to a technology to transfer data between elements of a multiprocessor, a memory, or the like in an information processing system, for example, between digital circuits or functional blocks thereof including complementary metal-oxide semiconductors (CMOS), and in particular, to a technology to increase transmission speed of a data transfer bus in which a plurality of elements are connected to one transmission line.
JP-A-5-2239807 (De Veer et al; U.S. Pat. No. 3,619,504) describes a non-contact bus wiring which is a bus method to transfer data at a high speed between many nodes, for example, in a multiprocessor system. FIG. 3 shows a fundamental layout of the wiring in which data is transferred between two nodes using crosstalk, i.e., a directional coupler. That is, in this transfer technology, data is transferred between a bus master 10-1 and slaves 10-2 to 10-8 by means of crosstalk between two transmission lines, i.e., wiring 1-1 and 1-2 to 1-8. In this diagram, Rtt indicates a termination resistor. This circuit configuration is suitable for data transfer between bus master 10-1 and slaves 10-2 to 10-8, but is not suitable for data transfer between slaves 10-2 to 10-8.
To solve the problem, JP-A-8-188366 (PCT/JP97/03922 filed Oct. 29, 1997) describes a gap coupling bus system. FIG. 4 shows a basic circuit of this system. In the circuit configuration of this technology, data is transferred between nodes 11 to 16 by use of crosstalk signals in directional coupling sections (1-4 to 5-6) in which wiring lines 21 to 26 are coupled with each other as shown in FIG. 4.
xe2x80x9cPresent State and Problems of Build-Up Multi-Layer Wiring Board Technologyxe2x80x9d written in pages 463 to 468 of the xe2x80x9cJournal of the Society of Circuit Engineers of Japanxe2x80x9d describes a technology of printed wiring boards in which via holes of pad-on-via type are implemented at a low cost to increase the wiring density.
In the wiring technology of the gap coupling bus system of JP-A-8-188366, one-bit slave-to-slave transfer routes are arranged in a lattice layout to couple all nodes with each other (in a multi-coupling wiring network). However, this network is not suitable to transfer multi-bit data for the following reasons. To construct a one-bit multi-coupling wiring network, the printed wiring board includes two signal layers arranged in a direction of thickness of the board to form a coupling network in a horizontal direction of the board. This increases the wiring width of each one-bit wiring. That is, to achieve a one-bit transfer using a multilayered printed wiring board, there are required four layers including two signal layers for each bit and two shield layers. For example, to simultaneously transfer data including one-byte, i.e., eight bits, there are required at least 23 layers including 16 signal layers (two layersxc3x978 bits) and seven shield layers to decrease interference between the bits. Even a personal computer today has a data width of eight bytes. In some server apparatuses, the data width is 16 bytes. To implement such a server using the technology, there are required at least 184 layers (8 bytesxc3x9723 layers) for 8-byte data width and 368 layers (16 bytesxc3x9723 layers) for 16-byte data width. However, it is difficult to manufacture 100 or more layers at a low cost in the printed wiring board technology at present. Particularly, it is practically impossible to construct a printed wiring board at a low cost using material such as glass epoxy or aramid.
It is therefore an object of the present invention to provide a data transmission technology in which multi-bit data is transferred between nodes via directional coupling (crosstalk) using a printed wiring board to thereby transfer data at a high speed.
Another object of the present invention to provide a data transmission technology in which differential signals from a directional coupler formed in a printed wiring board are compared with each other such that errors can be detected by demodulating an output signal resultant from the comparison.
To achieve the object in accordance with a concept of the present invention, since multi-bit data is transferred by directional coupling, when a one-bit multi-coupling wiring network is configured, using a multilayered printed wiring board, in a direction vertical to a board surface of the printed wiring board, a multi-bit configuration can be implemented with a minimized width of wiring for one bit in a wiring direction of the board.
The present invention has aspects as follows.
In accordance with a first aspect of the present invention, there is provided a directional coupling bus system including a bus connected to a plurality of modules each including an interface circuit to transfer digital data and a printed wiring board connected to the modules. The system further includes a termination resistor for impedance matching termination of each lead signal line from the modules and directional couplers in lead wiring ranging from a first one of the module to the termination resistor, the couplers including portions of lead wiring respectively from second and subsequent ones of the modules, the portions having a length of, for example, 30 mm. There is also included via holes of non-through type to connect the coupler between the modules to communicate data therebetween.
In accordance with a second aspect of the present invention, in the directional coupling bus system of the first aspect, the directional coupler includes two adjacent lines in one signal layer enclosed between ground planes or layers, and the coupler is connected via the via holes of non-though type.
In accordance with a third aspect of the present invention, in the directional coupler of the system of the first aspect, the digital signals from the modules are differential signals and the signal transmission from a functional element on one side to a functional element on another side is conducted by directional couplers of differential type.
In accordance with a fourth aspect of the present invention, there is provided a printed wiring board. In the bus system of the third aspect, the differential directional coupler includes two signal layers, layers 1 and 2 enclosed with power planes or layers of a printed wiring board. Differential signal (drive signal) lines from the functional element are arranged in layer 1 to be parallel to each other. Differential signal (receive signal) lines to the partner functional element are arranged in layer 2 to be at positions vertically associated with the differential drive signal lines in layer 1.
In accordance with a fourth aspect of the present invention, there is provided a printed wiring board. The directional coupler of differential type in accordance with the third aspect includes one signal layer enclosed with power planes of a printed wiring board. Differential signal (drive signal) lines from the functional element are arranged in the signal layer to be parallel to each other. Differential signal (receive signal) lines to the partner functional element are arranged in another layer of the signal layer to be on both sides of the differential drive signal lines.
In accordance with a sixth aspect of the present invention, there is provided a printed board by using the printed wiring board of the fourth or fifth aspect in which n functional elements (n is equal to or more than two) are mounted on the board. There are arranged m signal layers, each of the layer includes two layers in pair or one layer to configure a directional coupler of differential type. Pairs of signal and ground planes are disposed on the board to set m=nxe2x88x921.
There are further arranged P directional couplers to transfer data between the n modules, where P=nxc2x7(nxe2x88x921)/2. The P directional couplers are alternately disposed in a direction of thickness of the board such that wiring from the modules configure one set of the P directional couplers for each other module.
In accordance with a seventh aspect of the present invention, in the directional coupling bus system of the first aspect, a receiver includes a differential comparator having hysteresis.
In accordance with an eighth aspect of the present invention, in the directional coupling bus system of the seventh aspect, there is provided a directional coupling bus system of source clock synchronous type in which a receiver receiving data and a clock signal includes a differential comparator having hysteresis and the data is latched by a signal obtained by shifting the clock signal 90xc2x0 in phase.
In accordance with a ninth aspect of the present invention, in the directional coupling bus system of the first aspect, the receiver includes two differential comparators each having a voltage offset in which one of the receivers has a positive offset and the other one has a negative offset.
In accordance with a tenth aspect of the present invention, in the directional coupling bus system of the ninth aspect, a receiver of data and a clock signal includes a differential comparator having hysteresis and the data is latched by a signal obtained by shifting the clock signal 90xc2x0 in phase.
In accordance with an 11th aspect of the present invention, for the directional coupling bus system of the tenth aspect, there is provided an error detection circuit in which a differential signal of data signals from the receiver is latched by a differential signal of clock signals of the receiver. A positive logic (H) signal and a negative logic (L) are represented as an up signal and a down signal, respectively. Using the up and down signals, the directional coupling bus system changes its state as up signal input changes from a logical low level (L) to a logical high level (H) that is, xe2x80x9cLxe2x80x9d to xe2x80x9cHtxe2x80x9d up signal input change from xe2x80x9cHxe2x80x9d level to xe2x80x9cErrorxe2x80x9d state down signal input changes from xe2x80x9cLxe2x80x9d to xe2x80x9cErrorxe2x80x9dup signal input changes from xe2x80x9cHxe2x80x9d to xe2x80x9cLxe2x80x9d. Data or an error signal is produced in accordance with the state transition.
In accordance with the 12th aspect of the present invention, the directional coupling bus system of the 11th aspect includes an error detection circuit.
In accordance with the 13th aspect of the present invention, by using the printed board of the sixth aspect of the present invention, there is provided a bus system including a printed wiring board in which the wiring density is increased by consecutively arranging the P directional couplers.